1. Field of the Invention
The present invention relates in general to a solid-state storage device employing error correction coding (ECC), and in particular relates to a method for error correction decoding of ECC encoded data stored in the device.
2. Description of the Related Art
A typical solid-state storage device comprises one or more two dimensional arrays of storage cells for storing data. Existing semiconductor technologies provide solid-state storage devices suitable for relatively short term storage of data, such as volatile dynamic random access memory (DRAM), or for relatively longer term storage of data such as FLASH and non-volatile static random access memory (SRAM). Recently, a magnetoresistive storage device has been developed as a new type of solid-state storage device. The magnetoresistive solid-state storage device is also known as magnetic random access memory (MRAM). MRAM devices are non-volatile, have relatively low power consumption, and have relatively fast access times, particularly for data write operations, which renders MRAM devices ideally suitable for both short term and long term storage applications.
A problem arises in that solid-state storage devices are subject to physical failure, which can result in an unacceptable loss of stored data. In particular, currently available manufacturing techniques for MRAM devices are subject to limitations and as a result manufacturing yields of acceptable MRAM devices are relatively low. Although better manufacturing techniques are being developed, these tend to increase manufacturing complexity and cost. Hence, it is desired to apply lower cost manufacturing techniques whilst increasing device yield. Further, it is desired to increase cell density formed on a substrate such as silicon, but as the density increases manufacturing tolerances become increasingly difficult to control leading to higher failure rates and lower device yields.